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IS64LV25616AL
256K x 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY
FEATURES
* High-speed access time: 10, 12 ns * CMOS low power operation * Low stand-by power: Less than 5 mA (typ.) CMOS stand-by * TTL compatible interface levels * Single 3.3V power supply * Fully static operation: no clock or refresh required * Three state outputs * Data control for upper and lower bytes * Industrial temperature available * Temperature Offerings: Option A1: -40oC to +85oC Option A2: -40oC to +105oC Option A3: -40oC to +125oC * Lead-free available
ISSI
JULY 2006
(R)
DESCRIPTION The ISSI IS64LV25616AL is a high-speed, 4,194,304-bit
static RAM organized as 262,144 words by 16 bits. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access. The IS64LV25616AL is packaged in the JEDEC standard 44-pin TSOP Type II and 48-pin Mini BGA (8mm x 10mm).
FUNCTIONAL BLOCK DIAGRAM
A0-A17
DECODER
256K x 16 MEMORY ARRAY
VDD GND I/O0-I/O7 Lower Byte I/O8-I/O15 Upper Byte I/O DATA CIRCUIT
COLUMN I/O
CE OE WE UB LB CONTROL CIRCUIT
Copyright (c) 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. D 07/05/06
1
IS64LV25616AL
TRUTH TABLE
Mode Not Selected Output Disabled Read WE X H X H H H L L L CE H L L L L L L L L OE X H X L L L X X X LB X X H L H L L H L UB X X H H L L H L L I/O PIN I/O0-I/O7 I/O8-I/O15 High-Z High-Z High-Z DOUT High-Z DOUT DIN High-Z DIN High-Z High-Z High-Z High-Z DOUT DOUT High-Z DIN DIN
ISSI
VDD Current ISB1, ISB2 ICC ICC
(R)
Write
ICC
PIN CONFIGURATIONS 44-Pin TSOP (Type II)
PIN DESCRIPTIONS
A0-A17 I/O0-I/O15 CE Address Inputs Data Inputs/Outputs Chip Enable Input Output Enable Input Write Enable Input Lower-byte Control (I/O0-I/O7) Upper-byte Control (I/O8-I/O15) No Connection Power Ground
A0 A1 A2 A3 A4 CE I/O0 I/O1 I/O2 I/O3 VDD GND I/O4 I/O5 I/O6 I/O7 WE A5 A6 A7 A8 A9
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23
A17 A16 A15 OE UB LB I/O15 I/O14 I/O13 I/O12 GND VDD I/O11 I/O10 I/O9 I/O8 NC A14 A13 A12 A11 A10
OE WE LB UB NC VDD GND
2
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. D 07/05/06
IS64LV25616AL
PIN CONFIGURATIONS 48-Pin mini BGA
1 2 3 4 5 6
ISSI
PIN DESCRIPTIONS
A0-A17 I/O0-I/O15 CE OE WE Address Inputs Data Inputs/Outputs Chip Enable Input Output Enable Input Write Enable Input Lower-byte Control (I/O0-I/O7) Upper-byte Control (I/O8-I/O15) No Connection Power Ground
(R)
1 2 3 4 5 6 7 8 9 10 11 12
A B C D E F G H
LB I/O8 I/O9 GND VDD I/O14 I/O15 NC
OE UB I/O10 I/O11 I/O12 I/O13 NC A8
A0 A3 A5 A17 NC A14 A12 A9
A1 A4 A6 A7 A16 A15 A13 A10
A2 CE I/O1 I/O3 I/O4 I/O5 WE A11
NC I/O0 I/O2 VDD GND I/O6 I/O7 NC
LB UB NC VDD GND
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. D 07/05/06
3
IS64LV25616AL
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VTERM VDD TSTG PT Parameter Terminal Voltage with Respect to GND VDD Related to GND Storage Temperature Power Dissipation Value -0.5 to VDD+0.5 -0.3 to +4.0 -65 to +150 1.0 Unit V V C W
ISSI
(R)
Note: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
OPERATING RANGE
Options A1 A2 A3 Ambient Temperature -40C to +85C -40C to +105C -40C to +125C VDD 3.3V +10%, -5% 3.3V +10%, -5% 3.3V +10%, -5%
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol VOH VOL VIH VIL ILI Parameter Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage(1) Input Leakage GND VIN VDD A1 A2 A3 A1 A2 A3 Test Conditions VDD = Min., IOH = -4.0 mA VDD = Min., IOL = 8.0 mA Options Min. 2.4 -- 2.0 -0.3 -2 -5 -10 -2 -5 -10 Max. -- 0.4 VDD + 0.3 0.8 2 5 10 2 5 10 Unit V V V V A
ILO
Output Leakage
GND VOUT VDD, Outputs Disabled
A
Notes: 1. VIL (min.) = -2.0V for pulse width less than 10 ns.
4
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. D 07/05/06
IS64LV25616AL
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
Symbol Parameter ICC VDD Dynamic Operating Supply Current TTL Standby Current (TTL Inputs) TTL Standby Current (TTL Inputs) CMOS Standby Current (CMOS Inputs) Test Conditions VDD = Max., IOUT = 0 mA, f = fMAX VDD = Max., VIN = VIH or VIL CE VIH, f = fMAX. VDD = Max., VIN = VIH or VIL CE VIH, f = 0 VDD = Max., CE VDD - 0.2V, VIN VDD - 0.2V, or VIN 0.2V, f = 0 Options A1 A2 A3 A1 A2 A3 A1 A2 A3 A1 A2 A3 typ(2) -10 Min. Max. -- -- -- -- -- -- -- -- -- -- -- -- -- 100 -- -- 50 -- -- 20 -- -- 15 -- -- 5 -12 Min. Max. -- -- -- -- -- -- -- -- -- -- -- -- -- -- 110 120 -- 55 60 -- 30 40 -- 25 35 5
ISSI
Unit mA
(R)
1 2
mA
ISB
3
mA mA
ISB1
ISB2
4 5 6 7 8 9 10 11 12
Note: 1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change. Shaded area product in development 2. Typical values are measured at VDD = 3.3V, TA = 25oC and not 100% tested.
CAPACITANCE(1)
Symbol CIN COUT Parameter Input Capacitance Input/Output Capacitance Conditions VIN = 0V VOUT = 0V Max. 6 8 Unit pF pF
Note: 1. Tested initially and after any design or process changes that may affect these parameters.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. D 07/05/06
5
IS64LV25616AL
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
Symbol Parameter Read Cycle Time Address Access Time Output Hold Time CE Access Time OE Access Time OE to High-Z Output OE to Low-Z Output CE to High-Z Output CE to Low-Z Output LB, UB Access Time LB, UB to High-Z Output LB, UB to Low-Z Output Power Up Time Power Down Time -10 Min. Max. 10 -- 2 -- -- -- 0 0 3 -- 0 0 0 -- -- 10 -- 10 4 4 -- 4 -- 4 3 -- -- 10 -12 Min. Max. 12 -- 2 -- -- -- 0 0 3 -- 0 0 0 -- -- 12 -- 12 5 5 -- 6 -- 5 4 -- -- 12 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns
ISSI
(R)
tRC tAA tOHA tACE tDOE tHZOE(2) tLZOE(2) tHZCE(2 tLZCE(2) tBA tHZB(2) tLZB(2) tPU tPD
Notes: 1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0V to 3.0V and output loading specified in Figure 1. 2. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage.
AC TEST LOADS
319 3.3V
319 3.3V
OUTPUT 30 pF Including jig and scope 353
OUTPUT 5 pF Including jig and scope 353
Figure 1
Figure 2
AC TEST CONDITIONS
Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Level Output Load Unit 0V to 3.0V 3 ns 1.5V See Figures 1 and 2
6
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. D 07/05/06
IS64LV25616AL
AC WAVEFORMS READ CYCLE NO. 1(1,2) (Address Controlled) (CE = OE = VIL, UB or LB = VIL)
ISSI
t RC
(R)
1 2
ADDRESS
t AA t OHA
DOUT
PREVIOUS DATA VALID
t OHA
DATA VALID
READ1.eps
3 4
READ CYCLE NO. 2(1,3)
tRC
ADDRESS
5
tOHA
tAA
OE
6 7
tDOE
CE
tHZOE
tLZOE tACE tLZCE tHZCE
LB, UB
DOUT
HIGH-Z
tLZB
tBA
tRC
DATA VALID
tHZB
8
ICC
50%
VDD
Supply Current
tPU
50%
tPD
ISB
UB_CEDR2.eps
9 10 11 12
Notes: 1. WE is HIGH for a Read Cycle. 2. The device is continuously selected. OE, CE, UB, or LB = VIL. 3. Address is valid prior to or coincident with CE LOW transition.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. D 07/05/06
7
IS64LV25616AL
WRITE CYCLE SWITCHING CHARACTERISTICS(1,3) (Over Operating Range)
Symbol Parameter Write Cycle Time CE to Write End Address Setup Time to Write End Address Hold from Write End Address Setup Time LB, UB Valid to End of Write WE Pulse Width WE Pulse Width (OE = LOW) Data Setup to Write End Data Hold from Write End WE LOW to High-Z Output WE HIGH to Low-Z Output -10 Min. Max. 10 9 8 0 0 8 8 10 6 0 -- 2 -- -- -- -- -- -- -- -- -- -- 5 -- -12 Min. Max. 12 10 8 0 0 8 8 10 6 0 -- 2 -- -- -- -- -- -- -- -- -- -- 6 -- Unit ns ns ns ns ns ns ns ns ns ns ns ns
ISSI
(R)
tWC tSCE tAW tHA tSA tPBW tPWE1 tPWE2 tSD tHD tHZWE(2) tLZWE(2)
Notes: 1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0V to 3.0V and output loading specified in Figure 1. 2. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage. Not 100% tested. 3. The internal write time is defined by the overlap of CE LOW and UB or LB and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the write.
8
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. D 07/05/06
IS64LV25616AL
AC WAVEFORMS WRITE CYCLE NO. 1 (CE Controlled, OE is HIGH or LOW) (1 )
t WC
ADDRESS
VALID ADDRESS
ISSI
(R)
1
t HA
t SA
CE
t SCE
2 3
WE
t AW t PWE1 t PWE2 t PBW
UB, LB
t HZWE
DOUT
DATA UNDEFINED
HIGH-Z
t LZWE
4 5
UB_CEWR1.eps
t SD
DIN
t HD
DATAIN VALID
Notes: 1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CE and WE inputs and at least one of the LB and UB inputs being in the LOW state. 2. WRITE = (CE) [ (LB) = (UB) ] (WE).
6 7 8
WRITE CYCLE NO. 2 (WE Controlled. OE is HIGH During Write Cycle) (1,2)
t WC
ADDRESS
VALID ADDRESS
t HA
OE
9
LOW
CE
t AW t PWE1
WE
10
t LZWE
HIGH-Z
t SA
UB, LB
t PBW
t HZWE
DOUT
DATA UNDEFINED
11
UB_CEWR2.eps
t SD
DIN
t HD
DATAIN VALID
12
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. D 07/05/06
9
IS64LV25616AL
AC WAVEFORMS WRITE CYCLE NO. 3 (WE Controlled. OE is LOW During Write Cycle) (1)
t WC
ADDRESS OE CE
VALID ADDRESS
ISSI
(R)
LOW
t HA
LOW
t AW t PWE2
WE
t SA
UB, LB
t PBW
t HZWE
DOUT
DATA UNDEFINED
HIGH-Z
t LZWE
t SD
DIN
t HD
DATAIN VALID
UB_CEWR3.eps
WRITE CYCLE NO. 4 (LB, UB Controlled, Back-to-Back Write) (1,3)
t WC
ADDRESS
ADDRESS 1
t WC
ADDRESS 2
OE
t SA
CE
LOW
WE
t HA t SA t PBW t PBW
WORD 2
t HA
UB, LB
WORD 1
t HZWE
DOUT
HIGH-Z
t LZWE t HD
DATAIN VALID
DATA UNDEFINED
t SD
DIN
t SD
DATAIN VALID
t HD
UB_CEWR4.eps
Notes: 1. The internal Write time is defined by the overlap of CE = LOW, UB and/or LB = LOW, and WE = LOW. All signals must be in valid states to initiate a Write, but any can be deasserted to terminate the Write. The t SA, t HA, t SD, and t HD timing is referenced to the rising or falling edge of the signal that terminates the Write. 2. Tested with OE HIGH for a minimum of 4 ns before WE = LOW to place the I/O in a HIGH-Z state. 3. WE may be held LOW across many address cycles and the LB, UB pins can be used to control the Write function.
10
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. D 07/05/06
IS64LV25616AL
DATA RETENTION SWITCHING CHARACTERISTICS
Symbol Parameter VDD for Data Retention Data Retention Current Test Condition See Data Retention Waveform VDD = 2.0V, CE VDD - 0.2V A1 A2 A3 Options Min. 2.0 -- -- -- 0 Typ.(1) -- 5 -- -- -- --
ISSI
Max. 3.6 10 15 20 -- -- Unit V mA
(R)
VDR
IDR
1 2
tSDR tRDR
Data Retention Setup Time Recovery Time
See Data Retention Waveform See Data Retention Waveform
O
ns ns
tRC
Note 1: Typical values are measured at VDD = 3.0V, TA = 25 C and not 100% tested.
3 4
DATA RETENTION WAVEFORM (CE Controlled)
5
tSDR VDD Data Retention Mode tRDR
6 7
CE VDD - 0.2V
VDR
CE GND
8 9 10 11 12
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. D 07/05/06
11
IS64LV25616AL
ORDERING INFORMATION Temperature Range (A1): -40C to +85C
Speed (ns) 10 Order Part No. IS64LV25616AL-10TA1 Package TSOP (Type II)
ISSI
(R)
Temperature Range (A2): -40C to +105C
Speed (ns) 12 Order Part No. IS64LV25616AL-12TA2 IS64LV25616AL-12TLA2 IS64LV25616AL-12BA2 Package TSOP (Type II) TSOP (Type II), Lead-free Mini BGA (8mm x 10mm)
Temperature Range (A3): -40C to +125C
Speed (ns) 12 Order Part No. IS64LV25616AL-12TA3 IS64LV25616AL-12TLA3 IS64LV25616AL-12BA3 IS64LV25616AL-12BLA3 Package TSOP (Type II) TSOP (Type II), Lead-free Mini BGA (8mm x 10mm) Mini BGA (8mm x 10mm), Lead-free
12
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. D 07/05/06
PACKAGING INFORMATION
Mini Ball Grid Array Package Code: B (48-pin)
Top View 1 2 3 4 56 6
ISSI
Bottom View
b (48x)
(R)
5
4
3
2
1
A B C D D E F G H D1
e
A B C D E F G H
e E E1
A2 SEATING PLANE A1
A
Notes: 1. Controlling dimensions are in millimeters.
mBGA - 6mm x 8mm
MILLIMETERS Sym.
N0. Leads A A1 A2 D D1 E E1 e b -- 0.24 0.60 7.90 5.90
mBGA - 8mm x 10mm
INCHES Min. Typ. Max. Sym.
N0. Leads
MILLIMETER Min. Typ. Max.
48 -- 0.24 0.60 9.90 7.90 -- -- -- -- -- 1.20 0.30 -- 10.10 8.10 --
INCHES Min. Typ. Max.
Min. Typ. Max.
48 -- -- -- -- -- 1.20 0.30 -- 8.10 6.10
-- 0.009 0.024 0.311 0.232
-- -- -- -- --
0.047 0.012 -- 0.319 0.240
A A1 A2 D D1 E E1 e b
-- -- -- -- --
0.047 0.012 -- 0.398 0.319
0.009 0.024 0.390 0.311
5.25 BSC 3.75 BSC 0.75 BSC 0.30 0.35 0.40
0.207 BSC 0.148 BSC 0.030 BSC 0.012 0.014 0.016
5.25 BSC 3.75 BSC 0.75 BSC 0.30 0.35 0.40
0.207 BSC 0.148 BSC 0.030 BSC 0.012 0.014 0.016
Copyright (c) 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. D 01/15/03
PACKAGING INFORMATION
Plastic TSOP Package Code: T (Type II)
ISSI
Notes: 1. Controlling dimension: millimieters, unless otherwise specified. 2. BSC = Basic lead spacing between centers. 3. Dimensions D and E1 do not include mold flash protrusions and should be measured from the bottom of the package. 4. Formed leads shall be planar with respect to one another within 0.004 inches at the seating plane.
(R)
N
N/2+1
E1
E
1 D
N/2
SEATING PLANE
ZD
A
.
e b L A1 C
Symbol Ref. Std. No. Leads A A1 b C D E1 E e L ZD
Millimeters Min Max
Inches Min Max
Plastic TSOP (T - Type II) Millimeters Inches Min Max Min Max 44 -- 1.20 -- 0.047 0.05 0.15 0.002 0.006 0.30 0.45 0.012 0.018 0.12 0.21 0.005 0.008 18.31 18.52 0.721 0.729 10.03 10.29 0.395 0.405 11.56 11.96 0.455 0.471 0.80 BSC 0.032 BSC 0.41 0.60 0.016 0.024 0.81 REF 0.032 REF 0 5 0 5
Millimeters Min Max 50 -- 1.20 0.05 0.15 0.30 0.45 0.12 0.21 20.82 21.08 10.03 10.29 11.56 11.96 0.80 BSC 0.40 0.60 0.88 REF 0 5
Inches Min Max
(N) 32 -- 1.20 -- 0.047 0.05 0.15 0.002 0.006 0.30 0.52 0.012 0.020 0.12 0.21 0.005 0.008 20.82 21.08 0.820 0.830 10.03 10.29 0.391 0.400 11.56 11.96 0.451 0.466 1.27 BSC 0.050 BSC 0.40 0.60 0.016 0.024 0.95 REF 0.037 REF 0 5 0 5
-- 0.047 0.002 0.006 0.012 0.018 0.005 0.008 0.820 0.830 0.395 0.405 0.455 0.471 0.031 BSC 0.016 0.024 0.035 REF 0 5
Copyright (c) 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. F 06/18/03

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